Epitaxial layers having precisely defined electrical and physical properties are oftentimes grown upon the front side of a wafer, such as a silicon wafer, as an initial step in the formation of various devices or circuitry upon the wafer. In order to grow an epitaxial layer, a wafer is typically supported by a susceptor within an epitaxial reactor chamber. After elevating the temperature of the epitaxial reactor chamber, such as to 1050.degree. C. to 1150.degree. C., a gas is introduced into the epitaxial reactor chamber that reacts with the wafer to form the epitaxial layer on the front side of the wafer. For example, in order to grow a monocrystaline silicon layer upon a silicon wafer, a silane-based gas, such as trichlorosilane, is passed over the frontside of the silicon wafer. Once an epitaxial layer of sufficient thickness has been grown on the front side of the wafer, the wafer can be removed from the epitaxial reactor chamber.
Prior to depositing an epitaxial layer on the front side of a wafer, the backside of the wafer, opposite the front side, must oftentimes be processed. For example, the backside of the wafer must sometimes be etched prior to depositing the epitaxial layer on the front side of the wafer. By etching the backside of the wafer prior to the epitaxial deposition, marks, roughened portions and other imperfections can be removed from the backside of the wafer. By way of further example, the backside of the wafer must oftentimes be sealed prior to the epitaxial deposition in order to prevent autodoping. Autodoping generally refers to the release of dopants or contaminants from the backside of the wafer and the subsequent deposition of the released dopant or contaminants on the front side of the wafer during an epitaxial deposition process. In the absence of a back seal on the backside of the wafer, autodoping will generally occur during the epitaxial deposition process since the epitaxial deposition requires that the wafer be processed at such high temperatures. Autodoping is particularly disadvantageous since the dopant and contaminants that are deposited upon the front side of the wafer during the epitaxial deposition process alter the electrical characteristics, such as the resistivity, of the resulting epitaxial layer. In this regard, the dopant and contaminants are generally deposited about the periphery of the front side of the wafer, as opposed to a medial portion of the wafer. Thus, the electrical characteristics of the resulting epitaxial layer generally vary in a radial direction as a result of autodoping. More particularly, autodoping typically causes the resistivity of the resulting epitaxial layer to decrease in a radial direction from the medial portion of the wafer to an edge portion of the wafer since additional dopant is deposited along the edge portion of the wafer as a result of the autodoping. Since most, if not all, applications require that the electrical characteristics of an epitaxial layer be substantially equal or uniform across the entire front side of the wafer, the variations in the electrical properties of the epitaxial layer caused by autodoping are disadvantageous and may cause at least some of the resulting wafers to be scrapped.
In order to avoid autodoping, a back seal is typically applied to the backside of the wafer prior to inserting the wafer into the epitaxial reactor chamber. For example, a polysilicon layer can be grown on the backside of the wafer which significantly limits, if not eliminates, the release of dopant and contaminants from the backside of the wafer and thereby accordingly limits, if not eliminates, the subsequent deposition of the dopant and contaminants upon the front side of the wafer during the epitaxial deposition process.
Unfortunately, the processing of the backside of the wafer must generally be performed prior to inserting the wafer into the epitaxial reactor chamber. As such, a separate fabrication line must be maintained for either etching the backside of the wafer or applying a back seal to the backside of the wafer prior to inserting the wafer into the epitaxial reactor chamber. In order to apply a back seal to the backside of the wafer, the wafer is typically cleaned and then inserted into a furnace or other type of reactor chamber dedicated to growing back seal layers upon the backsides of wafers. As will be apparent, the additional equipment required to process the backside of the wafer prior to the insertion of the wafer in the epitaxial reactor chamber can cost significant amounts of money. For example, it is estimated that the cost of applying a back seal to the backside of a wafer contributes about 15%-20% of the cost of the resulting wafer having an epitaxial layer deposited on the front side thereof. In addition, the various steps that must be undertaken to apply a back seal to the backside of a wafer adds significantly to the overall processing time for the wafer. In this regard, since the wafer must be inserted into different furnaces or reaction chambers in order to apply the back seal to the backside of the wafer and to subsequently deposit the epitaxial layer on the front side of the wafer, the wafer must be repeatedly cleaned, a process that can require a significant amount of time.
Alternatively, reactor chambers have been developed in which the susceptors that support the wafers are coated, such as with polysilicon. Depending upon the wafer the polysilicon coating upon the susceptor and the processing conditions, the wafer can react with the polysilicon coating such that either the backside of the wafer is etched or a back seal layer is grown on the backside of the wafer. Unfortunately, the susceptors must be recoated, such as with polysilicon, on a regular basis, thereby increasing both the costs of the resulting wafers and the processing time required to fabricate the wafers.
Therefore, a need exists to more efficiently process the backside of the wafer prior to depositing an epitaxial layer upon the front side of the wafer. In this regard, while techniques have been developed for etching the backside of the wafer or applying a back seal to the backside of the wafer prior to depositing an epitaxial layer on the front side of the wafer, these techniques generally add significantly to the costs of the resulting wafer and the processing time required to fabricate the wafer. As such, improved techniques are desired for etching the backside of the wafer and applying a back seal to the backside of the wafer prior to depositing an epitaxial layer on the front side of the wafer that are more cost effective and that reduce the overall processing time for the resulting wafers.